Diodes AUR9703 Manuel d'utilisateur télécharger pdf (Page 16)

Data Sheet

1.5MHz, 800mA, STEP DOWN DC-DC CONVERTER AUR9703

Nov. 2011 Rev. 1 .0 BCD Semiconductor Manufacturing Limited

Application Information (Continued)

5. Efficiency Considerations

The efficiency of switching regulator is equal to the

output power divided by the input power times 100%.

It is usually useful to analyze the individual losses to

determine what is limiting efficiency and which

change could produce the largest improvement.

Efficiency can be expressed as:

Efficiency=100%-L1-L2-…..

Where L1, L2, etc. are the individual losses as a

percentage of input power.

Although all dissipative elements in the regulator

produce losses, two major sources usually account for

most of the power losses: V

quiescent current and

R losses. The V

quiescent current loss dominates

the efficiency loss at very light load currents and the

R loss dominates the efficiency loss at medium to

heavy load currents.

5.1 The V

quiescent current loss comprises two

parts: the DC bias current as given in the electrical

characteristics and the internal MOSFET switch gate

charge currents. The gate charge current results from

switching the gate capacitance of the internal power

MOSFET switches. Each cycle the gate is switched

from high to low, then to high again, and the packet

of charge, dQ moves from V

to ground. The

resulting dQ/dt is the current out of V

that is

typically larger than the internal DC bias current. In

continuous mode,

Where Q

and Q

are the gate charge of power

PMOSFET and NMOSFET switches. Both the DC

bias current and gate charge losses are proportional to

the V

and this effect will be more serious at higher

input voltages.

5.2 I

R losses are calculated from internal switch

resistance, R

and external inductor resistance R

In continuous mode, the average output current

flowing through the inductor is chopped between

power PMOSFET switch and NMOSFET switch.

Then, the series resistance looking into the LX pin is

a function of both PMOSFET R

DS(ON)

and NMOSFET

DS(ON)

resistance and the duty cycle (D):

Therefore, to obtain the I

R losses, simply add R

and multiply the result by the square of the

average output current.

Other losses including C

and C

OUT

ESR dissipative

losses and inductor core losses generally account for

less than 2 % of total additional loss.

6. Thermal Characteristics

In most applications, the part does not dissipate much

heat due to its high efficiency. However, in some

conditions when the part is operating in high ambient

temperature with high R

DS(ON)

resistance and high

duty cycles, such as in LDO mode, the heat

dissipated may exceed the maximum junction

temperature. To avoid the part from exceeding

maximum junction temperature, the user should do

some thermal analysis. The maximum power

dissipation depends on the layout of PCB, the thermal

resistance of IC package, the rate of surrounding

airflow and the temperature difference between

junction and ambient.

7. PCB Layout Considerations

When laying out the printed circuit board, the

following checklist should be used to optimize the

performance of AUR9703.

1) The power traces, including the GND trace, the LX

trace and the VIN trace should be kept direct, short

and wide.

2) Place the input capacitor as close as possible to the

VIN and GND pins.

3) The FB pin should be connected directly to the

feedback resistor divider.

4) Keep the switching node, LX, away from the

sensitive FB pin and the node should be kept small

area.

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