Diodes AP8800 Manuel d'utilisateur Page 3

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AP8800
Document number: DS31764 Rev. 7 - 2
3 of 13
www.diodes.com
August 2012
© Diodes Incorporated
A
P8800
Recommended Operating Conditions (@T
A
= +25°C, unless otherwise specified.)
S
y
mbol Parameter Min Max Unit
V
IN
Operating Input Voltage relative to GND 8.0 28 V
V
CTRLDC
Voltage Range for 24% to 200% DC Dimming Relative to GND (Note 2) 0.3 2.5 V
V
CTRLL
Voltage Low for PWM Dimming Relative to GND 0 0.2 V
f
OSC
Maximum Switching Frequency 500 kHz
T
A
Ambient Temperature Range -40 +85 °C
Duty Cycle Using Inductor 100µH (Note 3) 0.1 0.95
V
ENH
CTRL Input Voltage to Attain 100% LED Current 1.25
V
V
ENL
CTRL Input Voltage Below Which Device Turns Off 0.2
Notes: 2. For 100% brightness either leave floating or connect to 1.25V relative to GND.
3. For most applications the LED current will be within 8% over the duty cycle range specified. Duty cycle accuracy is also dependent on propagation
delay. Smaller size inductors can be used but LED current accuracy may be greater than 8% at extremes of duty cycle. This is most noticeable at low
duty cycles (less than 0.1) or when the input voltage is high and only one LED is being driven.
Electrical Characteristics (@T
A
= +25°C, unless otherwise specified.)
Symbol Parameter Conditions Min Typ Max Unit
I
OUT
Continuous Switch Current (Note 4) 350 mA
I
Q
Quiescient Current 20 30 μA
V
THD
Internal Current Sense Threshold Voltage V
IN
– V
SET
92 100 108 mV
V
REF
Internal Reference Voltage 1.25 V
SET SET Pin Input Current V
SET
= V
IN
-0.1 — 1.3 μA
R
DS
(on) On-Resistance of Internal Switch 1.7 2.2
I
SW_Leakage
Switch Pin Leakage Current 5 μA
θ
JA
Thermal Resistance Junction-to-Ambient
SO-8 (Note 5) 92
°C/W
MSOP-8 (Note 5)
120
°C/W
U-DFN3030-10 (Note 5)
46
°C/W
θ
JC
Thermal Resistance Junction-to-Case
SO-8 (Note 5)
60
°C/W
MSOP-8 (Note 5)
98
°C/W
U-DFN3030-10 (Note 5)
32
°C/W
Notes: 4. Refer to figure 8 for the device derating curve.
5. Test condition for SO-8, MSOP-8 and U-DFN3030-10: Device mounted on FR-4 PCB, 2”x 2”, 2oz copper, minimum recommended pad layout on
top layer and thermal vias to bottom layer ground plane. For better thermal performance, larger copper pad for heat-sink is needed.
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