Diodes AP3105NA/NV/NL/NR Manuel d'utilisateur télécharger pdf (Page 8)

AP3105NA/NV/NL/NR

Document number: DS36542 Rev. 1 - 2

8 of 13

www.diodes.com

September 2013

AP3105NA/NV/NL/NR

Product Line o

Diodes Incorporated

Operation Description

The AP3105NA/NV/NL/NR is specifically designed for off-line AC-

DC power supply used in LCD monitor, notebook adapter and

battery charger applications. It offers a cost effective solution with a

versatile protection function.

Start-up Current and UVLO

The start-up current of AP3105NA/NV/NL/NR is optimized to realize

ultra low current (5



A typical) so that VCC capacitor can be

charged more quickly. The direct benefit of low start-up current is

the availability of using large start-up resistor, which minimizes the

resistor power loss for high voltage AC input.

An UVLO comparator is included in AP3105NA/NV/NL/NR to detect

the voltage on VCC pin. It ensures that AP3105NA/NV/NL/NR can

draw adequate energy from hold-up capacitor during power-on. The

turn-on threshold is 15.5V and the turn-off threshold is 8.6V.

Current Sense Comparator and PWM Latch

The AP3105NA/NV/NL/NR operates as a current mode controller,

the output switch conduction is initiated by every oscillator cycle and

is terminated when the peak inductor current reaches the threshold

level established by the FB pin. The inductor current signal is

converted to a voltage signal by inserting a reference sense resistor

. The inductor current under normal operating conditions is

controlled by the voltage at FB pin. The relation between peak

inductor current (I

) and V

is:

SFBPK

RVI 3/)8.0( 

Moreover, FOCP with 1.8V threshold is only about 100ns delay,

which can avoid some catastrophic damages such as secondary

rectifier short test. Few drive cycles can alleviate the destruction

range and get better protection.

Leading-edge Blanking

A narrow spike on the leading edge of the current waveform can

usually be observed when the power MOSFET is turned on. A

250ns leading-edge blank is built-in to prevent the false-triggering

caused by the turn-on spike. During this period, the current limit

comparator is disabled and the gate driver can not be switched off.

At the time of turning on the MOSFET, a negative undershoot

(maybe larger than -0.3V) can occur on the SENSE pin. So it is

strongly recommended to add a small RC filter or at least connect a

resistor “R” on this pin to protect the IC (Shown as Figure 1).

SENSE

GATE

GND

CTRL

AP3105NA/

NV/NL/NR

VCC

Large undershoot (mor e than

-0.3 V) m ay damage the SENSE pin

Necessary

Figure 1

Built-in Slope Compensation

It is well known that a continuous current mode SMPS may become

unstable when the duty cycle exceeds 50%. The built-in slope

compensation can improve the stability, so there is no need for

design engineer to spend much time on that.

FB Pin and Short Circuit Protection

This pin is normally connected to the opto-coupler and always

paralleled with a capacitor for loop compensation. When the voltage

at this pin is greater than 4.2V and lasts for about 64ms, the IC will

enter the protection mode. For AP3105NA/NV/NR, the system will

enter hiccup mode to wait the V

decreasing to low UVLO level,

then the IC will try to restart until the failure removed. And when this

voltage is less than 1.55V, the IC will stop the drive pulse

immediately. Therefore, this feature can be used for short circuit

protection, which makes the system immune from damage.

Normally, output short makes the V

value to the maximum

because the opto-coupler is cut off.

Maintain Mode

During light load or step load, V

will drop and be lower than 1.55V,

thus the PWM drive signal will be stopped, and there is no more

new energy transferred due to no switching. Therefore, the IC

supply voltage may reduce to the shutdown threshold voltage and

system may enter the unexpected restart mode. To avoid this, the

AP3105NA/NV/NL/NR hold a so-called V

maintain mode which

can supply energy to VCC.

When V

decreases to a setting threshold, the V

maintain

comparator will output some drive signal to make the system switch

and provide a proper energy to VCC pin. The V

maintain function

will cooperate the PWM and burst mode loop which can make the

output voltage variation be within the regulation. This mode is very

useful for reducing startup resistor loss and achieving a better

standby performance with a low value VCC capacitor. The V

not easy to touch the shutdown threshold during the startup process

and step load. This will also simplify the system design. The

normal VCC voltage is suggested to be designed a little higher than

maintain threshold thus can achieve the best balance between

the standby and step load performance.

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