AP7340
Document number: DS35282 Rev. 3 - 2
11 of 15
www.diodes.com
February 2014
© Diodes Incorporated
P7340
Application Information
Output Capacitor
An output capacitor (C
OUT
) is needed to improve transient response and maintain stability. The AP7340 is stable with very small ceramic output
capacitors. The ESR (equivalent series resistance) and capacitance drives the selection. If the application has large load variations, it is
recommended to utilize low-ESR bulk capacitors. It is recommended to place ceramic capacitors as close as possible to the load and the ground
pin and care should be taken to reduce the impedance in the layout.
Input Capacitor
To prevent the input voltage from dropping during load steps it is recommended to utilize an input capacitor (C
IN
). A minimum 0.47μF ceramic
capacitor is recommended between V
IN
and GND pins to decouple input power supply glitch. This input capacitor must be located as close as
possible to the device to assure input stability and reduce noise. For PCB layout, a wide copper trace is required for both V
IN
and GND pins.
Enable Control
The AP7340 is turned on by setting the EN pin high, and is turned off by pulling it low. If this feature is not used, the EN pin should be tied to V
IN
pin to keep the regulator output on at all time. To ensure proper operation, the signal source used to drive the EN pin must be able to swing above
and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section.
Short Circuit Protection
When V
OUT
pin is short-circuit to GND, short circuit protection will be triggered and clamp the output current to approximately 60mA. This feature
protects the regulator from over-current and damage due to overheating.
Layout Considerations
For good ground loop and stability, the input and output capacitors should be located close to the input, output, and ground pins of the device. The
regulator ground pin should be connected to the external circuit ground to reduce voltage drop caused by trace impedance. Ground plane is
generally used to reduce trace impedance. Wide trace should be used for large current paths from V
IN
to V
OUT
, and load circuit.
ESR vs. Output Current
Ceramic type output capacitor is recommended for this series; however, the other output capacitors with low ESR also can be used. The relations
between I
OUT
(Output Current) and ESR of an output capacitor are shown below. The stable region is marked as the hatched area in the graph.
Measurement conditions:
Frequency Band : 10Hz to 2MHz, Temperature : -40°C to +85°C
(14 pages)
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