Diodes AP2181/ AP2191 Manuel d'utilisateur télécharger pdf (Page 4)

AP2181/ AP2191

Document number: DS31563 Rev. 7 - 2

4 of 17

www.diodes.com

March 2013

AP2181/ AP2191

Electrical Characteristics (@T

= +25°C, VIN = +5V, unless otherwise specified.)

Symbol Parameter Test Conditions Min Typ Max Unit

UVLO

Input UVLO

LOAD

= 1k

1.6 1.9 2.5 V

SHDN

Input Shutdown Current

Disabled, I

OUT

= 0

0.5 1 A

Input Quiescent Current

Enabled, I

OUT

= 0

45 70 µA

LEAK

Input Leakage Current Disabled, OUT grounded 1 µA

REV

Reverse Leakage Current

Disabled, V

= 0V, V

OUT

= 5V, I

REV

at V

1 µA

DS(ON)

Switch On-Resistance

= 5V,

OUT

= 1.5A

= +25°C

SOT25, MSOP-8EP, SO-8 95 115

m

U-DFN2018-6 90 110

-40C  T

 +85°C

140

= 3.3V,

OUT

= 1.5A

= +25°C

120 140

-40C  T

 +85°C

170

SHORT

Short-Circuit Current Limit

Enabled into short circuit, C

= 100µF

2.0 A

LIMIT

Over-Load Current Limit

= 5V, V

OUT

= 4.5V, C

= 120µF, -40°C  T

 +85°C

1.6 2.1 2.6 A

Trig

Current Limiting Trigger Threshold

Output Current Slew Rate (<100A/s) , C

= 100µF

2.6 A

EN Input Logic Low Voltage

= 2.7V to 5.5V

0.8 V

EN Input Logic High Voltage

= 2.7V to 5.5V

2 V

SINK

EN Input Leakage

= 5V

1 µA

D(ON)

Output Turn-On delay time

= 1µF, R

LOAD

= 10

0.05 ms

Output Turn-On rise time

= 1µF, R

LOAD

= 10

0.6 1.5 ms

D(OFF)

Output Turn-Off delay time

= 1µF, R

LOAD

= 10

0.01 ms

Output Turn-Off fall time

= 1µF, R

LOAD

= 10

0.05 0.1 ms

FLG

FLG Output FET On-Resistance

FLG

= 10mA, C

= 100µF

20 40 

Blank

FLG Blanking Time

= 10µF, C

= 100µF

4 7 15 ms

SHDN

Thermal Shutdown Threshold

Enabled, R

LOAD

= 1k

140

C

HYS

Thermal Shutdown Hysteresis 25

C



Thermal Resistance Junction-to-

Ambient

SO-8 (Note 5) 110

C/W

MSOP-8EP (Note 6) 60

C/W

SOT25 (Note 7) 157

C/W

U-DFN2018-6 (Note 8) 70

C/W

Notes: 5. Test condition for SO-8: Device mounted on FR-4, 2oz copper, with minimum recommended pad layout.

6. Test condition for MSOP-8EP: Device mounted on 2” x 2” FR-4 substrate PC board, 2oz copper, with minimum recommended pad on top layer and

thermal vias to bottom layer ground plane.

7. Test condition for SOT25: Device mounted on FR-4, 2oz copper, with minimum recommended pad layout.

8. Test condition for U-DFN2018-6: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad on top layer and 3 vias to bottom

layer 1.0”x1.4” ground plane.

1 2 3 4 5 6 7 8 9 ... 16 17

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